About

A photo of me.

I'm Austin Maliszewski, a Principal Design Engineer in the Architecture and Technology group at Arm in Austin, TX. In May 2015, I graduated with a Bachelors of Science in Engineering from the University of Michigan, Ann Arbor with a major in Computer Engineering and a minor in Mathematics. In addition to my work at Michigan, I also completed study abroad programs at the University of Manchester (in 2014) and the Université de technologie de Troyes, France (in 2012).

My research interests include computer architecture, embedded systems and operating systems.

Projects

This is an enumeration of some of the larger projects that I've worked on. Some of them are complete and some are still in progress. When possible, I've provided links to the codebase. If you're interested in seeing code from a project that is not currently publicly accessible, please send me an email describing who you are and what you're interested in, and I'll see about sharing it with you privately.

Talking Book

From January 2013 to May 2015, I worked with Professor Peter Chen and Professor David Blaauw in the Advanced Computer Architecture Laboratory at the University of Michigan on the Talking Book. The Talking Book is a project in partnership with Literacy Bridge, a not for profit organization trying to help bring information to illiterate people living deeply in poverty in the poorest parts of the world.

The primary way in which they do this is through the Talking Book, a low-power audio driven computer system, designed to be easy for illiterate people to use, to hear and disseminate information through audio recordings. The BBC News wrote an article about first-round trials of the Talking Book in Ghana. It's a must-read if you're interested in the work Literacy Bridge are doing.

We worked with Literacy Bridge to build a newer version of the Talking Book that is cheaper, more powerful, and more power efficient than the previous one. Based around the Arm Cortex-M0 processor, the new Talking Book chip avoids having DRAM through an innovative caching scheme, powered by the operating system and backed by NAND flash, saving both component cost and power cost. We've also wrote a custom, light-weight, POSIX like, preemptively multitasking operating system just for the Talking Book.

My contributions to the project were on the software side. I've was responsible for writing a number of drivers for the peripheral devices, including the Analog to Digital Converter, the capacitive buttons and the clock tuning components. I also wrote input and output functions to provide formatted, libc style IO over the UART and to provide formatted IO with files. I've also was responsible for verification of most of the other drivers, including the FAT32 filesystem driver. I also was heavily involved with testing various audio codecs and selecting the codec to provide native support for in the OS.

One of my biggest contributions to the project was in the build system. Before I started work, programming the chip through JTAG took a long time (order of an hour). This made development much slower than it should have been. I analyzed the Arm v6M CoreSight Debug components and debug protocols, and was able to figure out how to modify OpenOCD to make it transfer faster. Likewise, I spent time profiling where our block transfer system was spending most of its time and optimized our protocol, such that programming the chip now takes on the order of a second. The JTAG became fast enough to allow the chip to be mounted as a block device on Linux, so that we can easily interact with the on-device FAT filesystem, and not just the code partition. In fact, we get speeds of about 110KB/s for writes and 50KB/s for reads from the chip.

This project was developed primarily in ANSI C, with a little bit of Arm Thumb assembly, and a very tiny amount of C++.

Color Temperature Adaptive LED Lighting

Although most of the commercially available LED light bulb are advertised as being compatible with household dimmers, consumers buying these bulbs may not find that they live up to their expectations. While the bulbs do indeed dim using the dimmers, the color temperature of the light remains fairly constant even at low brightness -- unlike incandescent bulbs which produce a warmer light when dimmed. Commercial LED bulbs also generally cannot dim as deeply as incandescent bulbs.

Our research attempted to mix the light produced by a combination of white LEDs of different color temperature to achieve the aesthetic effect of a dimming incandescent bulb. To learn more about our research, you can view a video demonstration here.

The Math Circles of Chicago Registration System

One of my longest running projects is the Math Circles of Chicago registration website. Now, in it's fifth major version, the website is used to manage the meetings of the Math Circles of Chicago, a not-for-profit organization that offers math enrichment programs for hundreds of 5th through 12th graders at various sites in the Chicagoland area.

The website provides for student registration, lottery and class assignment, attendance taking, and other management features that have become critical to the smooth operation of the Math Circle. The current version of the website is written in Python3 on top of the Flask framework. If you're interested in seeing the code, please get in touch.

Marina: A Processor

This is a project that I worked on with a small group of students for our Major Design Experience course, EECS 470, Computer Architecture. Ordinarily, I wouldn't mention coursework here, but this was a very significant project, taking the better part of a semester, and several hundred hours from each of us.

"Marina" is a two-way superscalar, out-of-order (using the MIPS R10000 scheme), two-way simultaneous multi-threading (SMT) processor core written in synthesizable SystemVerilog. It consists of twenty discrete submodules that implement all the parts of an out-of-order superscalar processor, including a variable n-way set-associative quad-ported instruction cache, a variable n-way set-associative dual ported write-through data cache, a local history branch predictor, a parameterized reorder buffer (our submission used a ROB of 32 entries, to optimize clock time), and many others.

As I said earlier, "Marina" was a massive undertaking. There are just shy of 8,000 lines of code in the modules, about 1,300 lines of code in the simulation testbench, and about 12,000 lines of code in the module testbenches. For more information about Marina, and the decisions we made, I've posted our paper. Unfortunately, I can't release the code publicly. If you need to see sample code, please email me.

LC2K-MC

The LC2K is a toy ISA from EECS 370, the introductoy computer architecture class at the University of Michigan. The LC2K is a 32-bit, word-addressed, load-store architecture. There are 8 instructions in the LC2K ISA. In the course, students implement an assembler and four different simulators for the LC2K in C.

I've been interested in multicore systems and wanted to gain some experience working with them, so I decided to implement a multicore system in Verilog. The result of this is the LC2K-MC, a multicore version of the pipelined LC2K ISA in (what I think should be, though I haven't tried it yet, synthesizable) SystemVerilog.

The LC2K-MC supports a superset of the LC2K ISA, with additional instructions to help manage synchronization and additional arithmetic instructions to make the core a little more intelligent. Each core has separate instruction and data caches, which communicate with memory using a snoopy bus. The data caches use the MESI protocol for coherency. The cores are managed using memory mapped registers.

You can download the Verilog and read much more about the design at https://bitbucket.org/ausmal/lc2k.

Teaching

I've been fortunate to have the opportunity to be involved in teaching as an undergraduate.

EECS 370 - Introduction to Computer Organization

In the Fall 2013 Semester, I served as an Instructional Aide (the undergraduate version of a TA) for EECS 370, "Introduction to Computer Organization". EECS 370 is a 3rd year course required of all CS and CE students, as well as a popular elective for EE students. It is an introduction to computer architecture and assembly-language programming. I was responsible for holding office hours, leading a discussion section, and maintaining the autograder.

EECS 482 - Introduction to Operating Systems

In the Winter 2015 semster, I served as an Instructional Aide for EECS 482, "Introduction to Operating Systems". EECS 482 is a 4th year course that is a popular elective for CS and CE students. It is the first course in the University of Michigan CS curriculum in which multithreaded processing is taught in detail. For many CS students, it is the only interaction they will have with parallel programming during their undergraduate careers. My reponsibilities included holding office hours, leading a discussion section, and responding to student inquiries on an electronic discussion board.

Contact

I can be reached by email at ausmal (at) umich [dot] edu, by phone at +1 (773) 718-0962.

You can download a copy of my resume in PDF here, or in plain text here.

You can get my SSH public key here. My host SSH fingerprint is fa:65:c0:f2:e2:31:7a:58:d3:6d:93:ca:fc:81:15:35